Filled Vias Be Used in Multilayer PCBs

Vias are a critical component of any multilayer printed circuit board (PCB). The via’s function is to connect the inner layers of a multilayer PCB that are not exposed on either side. Whether the vias are filled or not, they contribute significantly to the quality and reliability of a circuit board.

While vias are not necessarily essential for every PCB, they are crucial for high-speed designs and those with a large number of components. They help to lower the component height, which in turn increases component placement density and reduces the overall size of the finished product. In addition, the copper used in vias has thermal conductivity, which can help to keep heat away from critical areas of the circuit board and lengthen its lifespan.

Typically, a via hole is created by drilling a small hole into the top or bottom layer of the filled vias. This can be done with a mechanical drill, or by laser beam (for microvias). Once the hole is drilled it must then be cleaned and prepped for the via-filling process. The vias can be filled with a variety of different materials, depending on the manufacturer and the PCB. The choice of material is usually based on cost, manufacturing time, required precision, hole depth, and diameter.

Can Filled Vias Be Used in Multilayer PCBs?

The most popular via-fill method is using a copper-based material. This is because it has the best thermal properties and can be easily deposited in a very thin layer. The via-filling process begins by creating a photoresist image of the via holes that need to be filled, then these are exposed and plated with copper. After this, the photoresist is removed and the via holes are filled with a copper-based resin, such as TAIYO THP-100 DX1 heat-curing enduring filler. This is then planarized and over-plated to prevent any voids in the hole barrel.

Another option for via-filling is to use a non-conductive material. This is often preferred when vias are used for power or ground connections. The reason is that the non-conductive material can absorb more expansion and contraction than the laminate, which may prevent stress fractures of the via walls.

Some designers choose to close unused vias during the PCB fabrication process instead of having them filled, saving manufacturing steps and costs. This is fine, but it is important to consider the CTE differences between the metal and laminate when doing this, as this can lead to stress fractures of the via wall.

It is also worth considering whether the PCB’s design requires buried or blind vias. Generally, it is recommended to avoid stacked vias where possible. This is because stacked vias require multiple steps to fabricate, and this can increase the complexity of the board and add extra costs. In addition, stacked vias are more likely to experience problems during assembly because of air or liquid entrapment that can cause shorts and failures. For these reasons, we recommend using staggered or angled vias instead of stacked vias in your designs.